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SY89809AL - 3.3V LVPECL/HSTL to HSTL 1:9 High Performance Clock Driver

Description

The SY89809AL is a high-performance bus clock driver with nine differential High-Speed Transceiver Logic (HSTL) output pairs.

Features

  • low pin-to-pin skew (15ps typical) and low part-to-part skew (100ps typical). The SY89809AL is available in a single space-saving package, enabling a lower overall.

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Datasheet Details

Part number SY89809AL
Manufacturer Micrel Semiconductor
File Size 280.99 KB
Description 3.3V LVPECL/HSTL to HSTL 1:9 High Performance Clock Driver
Datasheet download datasheet SY89809AL Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SY89809AL 3.3V LVPECL/HSTL to HSTL 1:9 HighPerformance Clock Driver with LVTTL Clock Select and Enable General Description The SY89809AL is a high-performance bus clock driver with nine differential High-Speed Transceiver Logic (HSTL) output pairs. The part is designed for use in low-voltage (3.3V/1.8V) applications, which require a large number of outputs to drive precisely aligned, ultra-low skew signals to their destination. The input is multiplexed from either HSTL or Low-Voltage Positive-Emitter-Coupled Logic (LVPECL) by the CLK_SEL pin. The Output Enable (OE) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state.
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